Saturday, September 24, 2011

Intel CTO Talks Up Many-Core Future


During the recent Intel Developer Forum (IDF), Intel CTO Justin Rattner discussed the swift drive toward many-core computing, noting that this is an important development for HPC as well as many other realms.

Among the demonstrations and previews of the “many-core age” to come, Intel’s CTO touched on the future of extreme scale computing. This topic gave the company a perfect opportunity to discuss their ten-year goal to create a 300-fold improvement in energy efficiency, moving power consumption down the scale to 20 picojoules per FLOP at the system level.

Intel’s Shekhar Borkar who works with DARPA’s UHPC project said that “today’s 100 gigaFLOPs computer uses 200 watts. By 2019, it should use about 2 watts, due to reductions in power required not only by the cores, but by the whole system, including memory and storage.”

IDF also provided Intel a window to discuss a concept chip, nicknamed Clarmont, which they say can operate at near threshold voltage and can scale from full performance to low power on less than ten milliwatts of power.

Rattner stressed that these and related developments at Intel wouldn’t be restricted to HPC—he pointed to a number of applications that showed 30 or more times performance improvements as the core count lifted to 64.


For further reading please visit : http://www.hpcwire.com/hpcwire/2011-09-19/intel_cto_talks_up_many-core_future.html

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